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June 2014 GNU Toolchain Update

Hi Guys,

  A lot has happened this month, so standby for the highlights:

  * The GDB 7.8 branch has just been created.  A release will probably happen next month.  The release will also mark a switch from using BZIP2 to using XZ to compress the source tarball.

  * Support for MIPS32R3, MIPS32R5, MIPS64R3 and MIPS64R5 variants has been added to GCC.

  * Support for the DragonFly BSD variant has been added to the toolchain.

  * A new feature of G++ allows warnings to be produced about things that will change when different versions of the C++ ABI are used:


    will warn about changes between ABI version <n> and the current ABI version (as set by -fabi-version= option).

  * The sanitizer feature of gcc now has a couple of new checks that can be enabled:


    This option enables floating-point to integer conversion checking, and warns when overflow occurs.


    This option enables instrumentation of array bounds.  Various out of bounds accesses are detected.  Flexible array members are not instrumented, as well as initializers of variables with static storage.

  * A new command line option -Wswitch-bool will produce a warning whenever a switch statement has an index of boolean type.  The warning is enabled by default for C and C++ programs, so the option exists in order to disable the warnings.

  * A new command line option -Wlogical-not-parentheses will produce warnings about a logical NOT being used on the left hand side of a comparison.  Its purpose is to detect suspicious code like the following:

     int a; ... ; if (!a > 1) { ... }

    It is possible to suppress the warning by wrapping the left hand side in parentheses like this:
     int a; ... ; if ((!a) > 1) { ... }

  * The AArch64 target now supports some built-in functions:

      unsigned int __builtin_aarch64_get_fpcr (void)
      void              __builtin_aarch64_set_fpcr (unsigned int)
      unsigned int __builtin_aarch64_get_fpsr (void)
      void             __builtin_aarch64_set_fpsr (unsigned int)

    These read and write the FPCR and FPSR control registers.

    There are also a set of new intrinsic functions for accessing the optional CRC instructions available with the AArch64 ISA.  These are:  
     uint32_t __crc32b (uint32_t, uint8_t)
      uint32_t __crc32h (uint32_t, uint16_t)
      uint32_t __crc32w (uint32_t, uint32_t)
      uint32_t __crc32d (uint32_t, uint64_t)
      uint32_t __crc32cb (uint32_t, uint8_t)
      uint32_t __crc32ch (uint32_t, uint16_t)
      uint32_t __crc32cw (uint32_t, uint32_t)
      uint32_t __crc32cd (uint32_t, uint64_t)

  * Similar to the above, the ARM target now supports a couple of built-in functions for accessing FPSCR control register:

     unsigned int __builtin_arm_get_fpscr (void)
      void         __builtin_arm_set_fpscr (unsigned int)

  * The RX target now supports arguments to the "interrupt" function attribute.  These arguments can be numbers, which assign the function to numbered interrupt vector in the current interrupt table.  They can also be strings, which specify the name of the interrupt table to be used by any following numbers, or the magic value "$default" which causes the function to be used for any unfilled slots in the current table.

    So, for example:

    void __attribute__ ((interrupt (1,"foo",2,"dct","$default")))  txd1_handler ();
    specifies that the tdx1_handler function should occupy slot 1 in the default table, slot 2 in the "foo" table and any empty slot in the "dct" table.




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