nickclifton (nickclifton) wrote,
nickclifton
nickclifton

May 2015 GNU Toolchain Update

Hi Guys,

  There are several things to report this month:

    * GCC now supports targets configured to use the MUSL C library:   http://www.musl-libc.org/


    * The Compiler has a new warning option: -Wmisleading-indentation
  
      This generates warnings when the indentation of the code does not reflect the block structure.  For example:

       if (some_condition ())
          foo ();
          bar ();
/* Gotcha: this is not guarded by the "if".  */

      The warning is disabled by default.


    * The Compiler also has a new shift warning: -Wshift-negative-value
    
      This generates warnings when left shifting a negative value.  The warning is enabled by -Wextra in C99 and C++11 modes (and newer).  The warning can be suppressed by an appropriate cast.  For example:
    
       val |= ~0 << loaded;       // Generates warning
       val |= (unsigned) ~0 << loaded;    // Does not warn


    * GCC supports a new option: -fno-plt

      When compiling position independent code this tells the compiler not to use PLT for external function calls.  Instead the address is loaded from the GOT and then branched to directly.  This leads to more efficient code by eliminating PLT stubs and exposing GOT load to optimizations.

      Not all architectures support this option, and some other optimization features, such as lazy binding, may disable it.


    * GCC's sanitizer has a new option: -fsanitize=bounds-strict

      This option enables strict instrumentation of array bounds.  Most out of bounds accesses are detected, including flexible array members and flexible array member-like arrays.


    * The AArch64 backend supports a new option to enable a workaround for the ARM Cortex-A53 erratum number 843419.  The workaround itself is implemented in the linker, but it can be enabled via the compiler option:

        -mfix-cortex-a53-843419
    
      Note, specifying -mcpu=cortex-a53 is not enough to enable this option as not all versions of the A53 need the erratum.


    * The AArch64 backend also supports a new core type of "native".  When used as -mcpu=native or -mtune=native it tells the backend to base its core selection on the host system.  If the compiler cannot recognise the processor of the host system then the option does nothing.


    * The Linker now supports the Intel MCU architecture:  https://groups.google.com/forum/#!topic/ia32-abi/cn7TM6J_TIg


    * GDB 7.9.1 has been released!

      GDB 7.9.1 brings the following fixes and enhancements over GDB 7.9:

     + PR build/18033 (C++ style comment used in gdb/iq2000-tdep.c and gdb/compile/compile-*.c)
     + PR build/18298 ("compile" command cannot find compiler if tools configured with triplet instead of quadruplet)
     + PR tui/18311 (Random SEGV when displaying registers in TUI mode)
     + PR python/18299 (exception when registering a global pretty-printer in verbose mode)
     + PR python/18066 (argument "word" seems broken in Command.complete (text, word))
     + PR pascal/17815 (Fix pascal behavior for class fields with testcase)
     + PR python/18285 (ptype expr-with-xmethod causes SEGV)

Cheers
  Nick
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