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November 23rd, 2015

October/November GNU Toolchain Update

Hi Guys,

  Sorry for the delay beqwteen these updates.  My new job is keeping me very busy...  Anyway here are the highlights of the changes in the GNU toolchain over the last two months:


  The compiler and assembler now have support for the ARC EM/HS and ARC600/700 architectures and the Power9 variant of the PowerPC architecture.

  The GCC mainline sources are now in Stage 3 (bug fixes only) which means that a branch may be happening soon.

  The Binutils sources have branched, getting ready for a 2.26 release soon.

  GDB's record instruction-history command accepts a new modifier: /s. This behaves exactly like the /m modifier and prints mixed source + disassembly into the history.

  GDB now supports displaced stepping on AArch64 GNU/Linux.

  GCC's named address space feature has been extended to add address spaces for the x86 architecture.  Here variables may be declared as being relative to the %fs or %gs segments using the __seg_fs and __seg_gs attributes.  Alternatively if one of these segments is used for thread local storage then the __seg_tls attribute can be used access the correct segment.

  GCC's function attribute feature has been extended to support another attribute: target_clones (<options>).  This is used to specify that a function is to be cloned into multiple versions compiled with different target options than specified on the command line.  The supported options and restrictions are the same as for target attribute.
  For instance on an x86, you could compile a function with target_clones("sse4.1,avx").   It will create 2 function clones, one compiled with -msse4.1 and another with -mavx.  At the function call it will create resolver ifunc, that will dynamically call a clone suitable for current architecture.

  A new type attribute has been added to specify the endianness of the fields in a struct, union or array: scalar_storage_order ("<endianness>"). This attribute sets the storage order, aka endianness, of the scalar fields of the type to either "big-endian" or "little-endian".  The attribute has no effects on fields which are themselves a union, a struct or an array whose component is a union or a struct, and it is possible to have fields with a different scalar storage order than the enclosing type.
  Additional restrictions are enforced for types with the reverse scalar storage order with regard to the scalar storage order of the target:
    * Taking the address of a scalar field of a union or a struct with reverse scalar storage order is not permitted and will yield an error.
    * Taking the address of an array field, whose component is scalar, of a union or a struct with reverse scalar storage order is permitted but will yield a warning, unless the option  -Wno-scalar-storage-order is specified.
    * Taking the address of a union or a struct with reverse scalar storage order is permitted.
  These restrictions exist because the storage order attribute is lost when the address of a scalar or the address of an array with scalar component is taken, so storing indirectly through this address will generally not work.  The second case is nevertheless allowed to be able to perform a block copy from or to the array.

  A new warning option: -Wduplicated-cond will produce messages whenever a condition is duplicated in an if-else-if chain.  The warning is enabled with -Wall.  It will for example warn about:

    if (p->q != NULL) { ... }
    else if (p->q != NULL) { ... }

  A new option: -fkeep-static-functions will make sure that gcc will generate code for static functions that are never used.

  The block reordering optimization in gcc can now be tuned via the option: -freorder-blocks-algorithm=<simple|stc>. The default for optimization levels below -O2 (or at -Os) is the simple algorithm  which does not increase code size.  The new stc algorithm stands for "software trace cache" and it tries to put all often executed code together, minimizing the number of branches executed by making extra copies of code.

  The ARM backend supports a new option: -mlow-precision-recip-sqrt which uses two steps instead of three for double-precision reciprical square root calculations.  (It also uses one step instead of two steps for single-precision calculations).  This reduces the latency and precision of the operation.

  The x86 and x86_64 backends support a new option: -mms-bitfields This enables a bit-field layout compatible with the native Microsoft Windows compiler.   This option is enabled by default for Windows targets.

  The x86 and x86_64 backends also support the new option: -mmitigate-rop. This tries to avoid generating code sequences that contain unintended return opcodes, to mitigate against certain forms of attack.  At the moment, this option is limited in what it can do and should not be relied on to provide serious protection.

  The assembler and linker now support a configure time option to enable the automatic compression of debug sections.  This is off by default, but after the next release of the binutils, it will be switched on by default for some targets.

  The linker supports a new ARM specific command line option: --fix-stm32l4xx-629360.  This enables a link-time workaround for a bug in the bus matrix / memory controller for some of the STM32 Cortex-M4 based products (STM32L4xx).

  The objcopy program now has the ability to insert new symbols into an object file or executable.  It is controlled by the option: --add-symbol <name>=[<section>:]<value>[,<flags>].
  This adds a new symbol called <name>.  If the <section> is given, the symbol will be associated with and relative to that section, otherwise it will be an absolute symbol.  Symbol flags can be specified as well although not all flags will be meaningful for all object file formats.  The special flag before=<othersym> will insert the new symbol in front of the specified <othersym>, otherwise the symbol(s) will be added at the end of the symbol table in the order they appear.

  The MSP430 port of gas accepts a new command line option to control workarounds for various silicon errata: -msilicon-errata=<name>[,<name>...]. This option enables the specified workarounds, but does not produce any informative output for the user when it does so.  The related option: -msilicon-errata-warn=<name>[,<name>...] can be used to produce warning messages whenever a situation where a silicon errata might be valid is encountered by the assembler.

  The x86/x86_64 linkers now support a command line option to specify the byte to be used as padding when transforming an indirect call to a locally defined function 'foo' into a call via its GOT slot:

  -z call-nop=prefix-addr   generates: "0x67 call foo"
   -z call-nop=prefix-nop     generates: "0x90 call foo"
  -z call-nop=suffix-nop     generates: "call foo 0x90"
   -z call-nop=prefix-<byte> generates: " call foo"
 
-z call-nop=suffix-<byte> generates: "call foo <byte>"

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